1. Technical Field
The present invention relates to a data processing system in general, and in particular to a method of transmitting packets. Still more particularly, the present invention relates to a method of transmitting command packets on a bus within a data processing system
2. Description of the Prior Art
Within a data processing system, various devices, such as a processor, a system memory, etc., are typically interconnected with each other via a group of wires known as a bus. In fact, the technique of using a bus to transmit data has been in common use since the early days of electronic computers. Two types of buses are typically utilized in a data processing system, namely, a data bus and an address bus. As their names imply, the data bus is utilized to transmit data, and the address bus is utilized to transmit addresses. There are many advantages in using a single interconnect such as a bus for interconnecting devices within a data processing system. For example, new devices can easily be added or even be ported between data processing systems that use a common bus.
According to the prior art, command packets are sent from a bus master to a bus slave of a bus in a serial manner. Specifically, the bus master initially sends a command packet to the bus slave, and the bus slave replies by sending a response back to the bus master after the command packet has been accepted. With this type of serial transmission arrangement, a bottle-neck can easily occur on a uni-directional bus. Thus, it is desirable to provide an improved method of transmitting command packets on a bus within a data processing system.
In accordance with a preferred embodiment of the present invention, a data processing system includes a bus connected between a bus master and a bus slave. The bus master consecutively issues multiple packets, such as command packets, to the bus slave on the bus. The packets include order sensitive packets and non-order sensitive packets. In response to a temporary inability of the bus slave to process a particular one of the order sensitive packets due to a lack of resources, the bus slave keeps retrying the particular order sensitive packet. When resources become available, the bus slave processes the retried order sensitive packets in order while allowing the retried non-order sensitive packets to be processed in any order.
All objects, features, and advantages of the present invention will become apparent in the following detailed written description.